MAX1394ETB+T【PDF 2/18 页】IC ADC 8BIT 416KSPS 10-TDFN-EP

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MAX1391/MAX1394

Applications Information

Starting a Conversion

A falling edge on CS initiates the power-up sequence

and begins acquiring the analog input as long as OE is

also asserted low. On the 3rd SCLK falling edge, the

analog input is held for conversion. The most significant

bit (MSB) decision is made and clocked onto DOUT on

the 4th SCLK falling edge. Valid DOUT data is available

to be clocked into the master (microcontroller (C)) on

the following SCLK rising edge. The rest of the bits are

decided and clocked out to DOUT on each successive

SCLK falling edge. See Figures 8 and 9 for conversion

timing diagrams.

Once a conversion has been initiated, CS can go high at

any time. Further falling edges of CS do not reinitiate an

acquisition cycle until the current conversion completes.

Once a conversion completes, the first falling edge of CS

begins another acquisition/conversion cycle.

Selecting Unipolar or Bipolar Mode

(MAX1391 Only)

Drive UNI/BIP high to select unipolar mode or pull

UNI/BIP low to select bipolar mode. UNI/BIP can be

connected to VDD for logic-high, to GND for logic-low,

or actively driven. UNI/BIP needs to be stable for tUBS

prior to the first rising edge of SCLK after the CS falling

edge (see Figure 1) for a valid conversion result when

being actively driven.

Selecting Analog Input AIN1 or AIN2

(MAX1394 Only)

Pull CH1/CH2 low to select AIN1 or drive CH1/CH2

high to select AIN2 for conversion. CH1/CH2 can be

connected to VDD for logic-high, to GND for logic-low,

or actively driven. CH1/CH2 needs to be stable for tCHS

prior to the first rising edge of SCLK after the CS falling

edge (see Figure 1) for a valid conversion result when

being actively driven.

______________________________________________________________________________________

1.5V to 3.6V, 416ksps, 1-Channel True-Differential/

2-Channel Single-Ended, 8-Bit, SAR ADCs

ZS = 0

FS = VREF

1 LSB =

VREF

256

OUTPUT

CODE

(hex)

INPUT VOLTAGE (LSB)

1234

FS - 1.5 LSB

FULL-SCALE

TRANSITION

Figure 5. Unipolar Transfer Function

ZS = 0

+FS =

VREF

-FS =

-VREF

1 LSB =

VREF

256

-FS

+FS

OUTPUT

CODE

(hex)

INPUT VOLTAGE (LSB)

+FS - 1.5 LSB

-FS + 0.5 LSB

FULL-SCALE

TRANSITION

Figure 6. Bipolar Transfer Function

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